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Proceedings Paper

Metal gates for advanced CMOS technology
Author(s): Bikas Maiti; Phil J. Tobin
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Paper Abstract

This paper will provide an overview of the emerging trends in metal gate solutions for advanced CMOS technology. Performance enhancement in silicon-based CMOS technology through MOSFET scaling has shown some limitations with the current polysilicon gate electrode. Replacing polysilicon gate electrode by metal appears to be promising. However, the choice of the metal gate material depends on its work functions, thermal/chemical stability with surrounding materials, process integration, deposition process, resistivity, and eventually performance, reliability and future scaling. This paper will discuss some of the result published in the literature that address some of these issues and propose future directions. Single mid-gap metal gate approach appears to be simpler from an integration point of view but achieving low MOSFET threshold voltage is a concern. Some channel engineering approaches have been reported to address this issue. Dual metal gate approach with work function similar to n+ and p+ doped poly-Si appears ideal, although processing complexity could be a hindrance. Also the need for inlaid gate integration could be enhanced because of thermal/chemical stability effects of metal gate electrode with underlying gate dielectric, the inability to etch new materials or to reduce device instability due to film stress as in the conventional approach. The performance improvement of CMOS devices has been estimated with metal gates along with reliability issues.

Paper Details

Date Published: 1 September 1999
PDF: 12 pages
Proc. SPIE 3881, Microelectronic Device Technology III, (1 September 1999); doi: 10.1117/12.360560
Show Author Affiliations
Bikas Maiti, Motorola (United States)
Phil J. Tobin, Motorola (United States)

Published in SPIE Proceedings Vol. 3881:
Microelectronic Device Technology III
David Burnett; Toshiaki Tsuchiya, Editor(s)

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