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Proceedings Paper

Estimation of quantum mechanical and polysilicon depletion effects for ultrathin silicon dioxide gate dielectric
Author(s): G. Srinivasan; Samar K. Saha; G. A. Rezvani
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Paper Abstract

This paper presents a simple methodology to estimate the impact of inversion layer quantization and polysilicon-gate depletion effects on ultra-thin silicon-dioxide gate dielectric. We have used process and device simulation to determine the physical oxide thickness from the measured capacitance data, and the corresponding effective gate oxide thickness at inversion was computed from the simulation data obtained with an without the quantum mechanical and polysilicon depletion effects. The simulation result indicate that the effective gate oxide thickness is significantly higher than the physically grown oxide thickness due to inversion layer quantization and polysilicon depletion effects. The increase in oxide thickness is strongly dependent on the supply voltage and is more than 0.6 nm at 1 V. We have also measured the gate- leakage current for the same devices with gate oxide thickness less than 3 nm. Our data also show that in order to maintain a leakage current >= 1 A/cm2 for 1 V operation, the effective gate oxide thickness must be >= 2.2 nm.

Paper Details

Date Published: 1 September 1999
PDF: 7 pages
Proc. SPIE 3881, Microelectronic Device Technology III, (1 September 1999); doi: 10.1117/12.360549
Show Author Affiliations
G. Srinivasan, VLSI Technology, Inc. (United States)
Samar K. Saha, VLSI Technology, Inc. (United States)
G. A. Rezvani, VLSI Technology, Inc. (United States)


Published in SPIE Proceedings Vol. 3881:
Microelectronic Device Technology III
David Burnett; Toshiaki Tsuchiya, Editor(s)

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