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Proceedings Paper

Manufacturability of a 0.18-um OPC technology
Author(s): RenGuey Hsieh; Huitzu Lin; John C.H. Lin; Anthony Yen; Chue-San Yoo; Jia-Jing Wang
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Paper Abstract

A commercial OPC software is employed to add assisting features and hammerheads on the critical layers of VLSI chips; the resulting features on the masks and resist patterns on wafers have been studied. The 0.18 micrometer mask patterns with this OPC has shown approximately 0.3 micrometer wider focus latitude than that without OPC assistant features. The energy latitude is 6% larger for the one with OPC features. A microprocessor has been used as a vehicle to show the influence of adding OPC features in terms of product yield. Chips with OPC has about 6% to 8% higher yield than those without OPC under nominal exposure conditions. OPC turns out to be much more effective at extreme exposure conditions, e.g., at smaller CD regime very much less than 0.18 micrometer. The various defect types and sizes created in these OPC masks are also studied including defect printability on wafers.

Paper Details

Date Published: 25 August 1999
PDF: 8 pages
Proc. SPIE 3748, Photomask and X-Ray Mask Technology VI, (25 August 1999); doi: 10.1117/12.360209
Show Author Affiliations
RenGuey Hsieh, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)
Huitzu Lin, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)
John C.H. Lin, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)
Anthony Yen, Taiwan Semiconductor Manufacturing Co., Ltd. (United States)
Chue-San Yoo, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)
Jia-Jing Wang, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)


Published in SPIE Proceedings Vol. 3748:
Photomask and X-Ray Mask Technology VI
Hiroaki Morimoto, Editor(s)

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