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Proceedings Paper

FPGA implementation of image component labeling
Author(s): Danny Crookes; Khaled Benkrid
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Paper Abstract

Connected Component Labelling is an important task in intermediate image processing. Several algorithms have been developed to handle this problem. Hardware implementations have typically been based on massively parallel architectures, with one logical processing element per pixel. This approach requires a great deal of logic, so current solutions are often implemented in VLSI rather than on FPGAs, and are limited in the size of image which can be labelled.

Paper Details

Date Published: 26 August 1999
PDF: 7 pages
Proc. SPIE 3844, Reconfigurable Technology: FPGAs for Computing and Applications, (26 August 1999); doi: 10.1117/12.359538
Show Author Affiliations
Danny Crookes, Queen's Univ. of Belfast (United Kingdom)
Khaled Benkrid, Queen's Univ. of Belfast (United Kingdom)

Published in SPIE Proceedings Vol. 3844:
Reconfigurable Technology: FPGAs for Computing and Applications
John Schewel; Peter M. Athanas; Steven A. Guccione; Stefan Ludwig; John T. McHenry, Editor(s)

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