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Proceedings Paper

IRST system: hardware implementation issues
Author(s): Suyog D. Deshpande; Philip Chan; W. Ser; Ronda Venkateswarlu
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Paper Abstract

Generally, Infrared Search and Track systems use linear focal-plane-arrays with time-delay and integration, because of their high sensitivity. However, the readout is a cumbersome process and needs special effort. This paper describes signal processing and hardware (HW) implementation issues related to front-end electronics, non-uniformity compensation, signal formatting, target detection, tracking and display system. This paper proposes parallel pipeline architecture with dedicated HW for computationally intensive algorithms and SW intensive DSP HW for reconfigurable architecture.

Paper Details

Date Published: 12 July 1999
PDF: 12 pages
Proc. SPIE 3701, Infrared Imaging Systems: Design, Analysis, Modeling, and Testing X, (12 July 1999); doi: 10.1117/12.352967
Show Author Affiliations
Suyog D. Deshpande, Nanyang Technological Univ. (Singapore)
Philip Chan, Defence Science Organization (Singapore)
W. Ser, Nanyang Technological Univ. (Singapore)
Ronda Venkateswarlu, Nanyang Technological Univ. (Singapore)

Published in SPIE Proceedings Vol. 3701:
Infrared Imaging Systems: Design, Analysis, Modeling, and Testing X
Gerald C. Holst, Editor(s)

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