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Proceedings Paper

Antireflective coating optimization techniques for sub-0.2-μm geometries
Author(s): Kevin D. Lucas; C. Cook; K. Lee; Jamie A. Vasquez; B. Montgomery; K. Wehmer; Stanley M. Filipiak; D. O'Meara; Charles Fredrick King; Anna Phillips; Benjamin C. P. Ho
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Paper Abstract

As 248 nm DUV lithography is pushed to the 0.18 micrometers generation with logic features 0.14 micrometers and below, process control requirements become severe. Previously acceptable exposure latitude variations due to substrate reflectivity have become unacceptable. Additionally, next generation 248 nm steppers with extremely narrow band laser illumination cause significant increase in substrate interference effects. These factors create stringent requirements for anti-reflective coating (ARC) optimization. We present result of experimental work to fine tune inorganic ARC thickness and optical properties for subtractive and inlaid feature types at the 0.18 micrometers generation. This work focuses on cost and time effective single wafer ARC optimization methods for extension to 300 nm wafer sizes. The methods include reflectometry, spectroscopic ellipsometry, generation of test wafers with large film thickness uniformity and calibrated simulation.

Paper Details

Date Published: 14 June 1999
PDF: 11 pages
Proc. SPIE 3677, Metrology, Inspection, and Process Control for Microlithography XIII, (14 June 1999); doi: 10.1117/12.350832
Show Author Affiliations
Kevin D. Lucas, Motorola (Belgium)
C. Cook, Motorola (United States)
K. Lee, Motorola (United States)
Jamie A. Vasquez, Motorola (United States)
B. Montgomery, Motorola (United States)
K. Wehmer, Motorola (United States)
Stanley M. Filipiak, Motorola (United States)
D. O'Meara, Motorola (United States)
Charles Fredrick King, Motorola (United States)
Anna Phillips, Motorola (United States)
Benjamin C. P. Ho, Motorola (United States)


Published in SPIE Proceedings Vol. 3677:
Metrology, Inspection, and Process Control for Microlithography XIII
Bhanwar Singh, Editor(s)

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