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Proceedings Paper

CMP process development based on rapid automatic defect classification
Author(s): Andrew Skumanich; Man-Ping Cai
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Paper Abstract

A critical aspect for the optimization of advanced CMP process development is minimizing defects. Given the complexity of the CMP process, the requirements for defect reduction are increasing. New materials, processes, and consumables lead to unanticipated defect types. In addition, comprehensive defectivity studies must involve patterned wafers since many of the process have defects and issues unique to patterned wafers. A novel defect reduction methodology is described utilizing wafer inspection tools for advanced CMP process development which has been implemented at Applied Materials. This methodology is based on a wafer inspection tools which provide classified defect counts not simply total defect count. A wafer inspection system is used in combination with a high throughput defect- review SEM (SEMVision). This combination of tools provide rapid defect classification and source identification for process development and defect elimination. The WF736 generates classification during the inspection with no loss in throughput. The SEMVision allows for further detailed analysis and classification. In addition, patterned wafers are utilized for thorough defect capture and process studies. The methodology provides critical information for improved process development and analysis, as well as enhanced time efficiency. Three applications are presented: tool and process development, defect learning for new materials, and process maintenance.

Paper Details

Date Published: 27 April 1999
PDF: 13 pages
Proc. SPIE 3743, In-Line Characterization, Yield Reliability, and Failure Analyses in Microelectronic Manufacturing, (27 April 1999); doi: 10.1117/12.346901
Show Author Affiliations
Andrew Skumanich, Applied Materials Inc. (United States)
Man-Ping Cai, Applied Materials Inc. (United States)


Published in SPIE Proceedings Vol. 3743:
In-Line Characterization, Yield Reliability, and Failure Analyses in Microelectronic Manufacturing
Kostas Amberiadis; Gudrun Kissinger; Katsuya Okumura; Seshu Pabbisetty; Larg H. Weiland, Editor(s)

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