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Proceedings Paper

Importance of balanced architectures in the design of high-performance imaging systems
Author(s): Joseph A. Sgro; Paul C. Stanton
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Paper Abstract

Imaging systems employed in demanding military and industrial applications, such as automatic target recognition and computer vision, typically require real-time high-performance computing resources. While high- performances computing systems have traditionally relied on proprietary architectures and custom components, recent advances in high performance general-purpose microprocessor technology have produced an abundance of low cost components suitable for use in high-performance computing systems. A common pitfall in the design of high performance imaging system, particularly systems employing scalable multiprocessor architectures, is the failure to balance computational and memory bandwidth. The performance of standard cluster designs, for example, in which several processors share a common memory bus, is typically constrained by memory bandwidth. The symptom characteristic of this problem is failure to the performance of the system to scale as more processors are added. The problem becomes exacerbated if I/O and memory functions share the same bus. The recent introduction of microprocessors with large internal caches and high performance external memory interfaces makes it practical to design high performance imaging system with balanced computational and memory bandwidth. Real word examples of such designs will be presented, along with a discussion of adapting algorithm design to best utilize available memory bandwidth.

Paper Details

Date Published: 26 March 1999
PDF: 11 pages
Proc. SPIE 3645, Real-Time Imaging IV, (26 March 1999); doi: 10.1117/12.343797
Show Author Affiliations
Joseph A. Sgro, Alacron, Inc. (United States)
Paul C. Stanton, Alacron, Inc. (United States)


Published in SPIE Proceedings Vol. 3645:
Real-Time Imaging IV
Divyendu Sinha, Editor(s)

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