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Proceedings Paper

MASPINN: novel concepts for a neuroaccelerator for spiking neural networks
Author(s): T. Schoenauer; N. Mehrtash; Andreas Jahnke; H. Klar
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Paper Abstract

We present the basic architecture of a Memory Optimized Accelerator for Spiking Neural Networks. The accelerator architecture exploits two novel concepts for an efficient computation of spiking neural networks: weight caching and a compressed memory organization. These concepts allow a further parallelization in processing and reduce bandwidth requirements on accelerator's components. Therefore, they pave the way to dedicated digital hardware for real-time computation of more complex networks of pulse-coded neurons in the order of 106 neurons. The programmable neuron model which the accelerator is based on is described extensively. This shall encourage a discussion and suggestions on features which would be desirable to add to the current model.

Paper Details

Date Published: 22 March 1999
PDF: 10 pages
Proc. SPIE 3728, Ninth Workshop on Virtual Intelligence/Dynamic Neural Networks, (22 March 1999); doi: 10.1117/12.343072
Show Author Affiliations
T. Schoenauer, Technical Univ. of Berlin (Germany)
N. Mehrtash, Technical Univ. of Berlin (Germany)
Andreas Jahnke, Technical Univ. of Berlin (Germany)
H. Klar, Technical Univ. of Berlin (Germany)


Published in SPIE Proceedings Vol. 3728:
Ninth Workshop on Virtual Intelligence/Dynamic Neural Networks
Thomas Lindblad; Mary Lou Padgett; Jason M. Kinser, Editor(s)

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