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Proceedings Paper

Efficient implementation of block-matching motion estimation algorithms for video compression on custom computers
Author(s): Vera Ying Y. Chung; Neil W. Bergmann
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Paper Abstract

This paper presents how to implement the block-matching motion estimation algorithm efficiently by Field Programmable Gate Arrays (FPGAs) based Custom Computer Machine (CCM) for video compression. The SPACE2 Custom Computer board consists of up to eight Xilinx XC6216 fine- grain, sea-of-gate FPGA chips. The results show that two Xilinx XC6216 FPGA can perform at 960 MOPs, hence the real- time full-search motion estimation encoder can be easily implemented by our SPACE2 CCM system.

Paper Details

Date Published: 21 December 1998
PDF: 9 pages
Proc. SPIE 3655, Media Processors 1999, (21 December 1998); doi: 10.1117/12.334765
Show Author Affiliations
Vera Ying Y. Chung, Queensland Univ. of Technology (Australia)
Neil W. Bergmann, Queensland Univ. of Technology (Australia)


Published in SPIE Proceedings Vol. 3655:
Media Processors 1999
Sethuraman Panchanathan; Subramania I. Sudharsanan; V. Michael Bove, Editor(s)

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