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Proceedings Paper

Video coprocessor: video processing in the DCT domain
Author(s): Ahmed M. Darwish
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Paper Abstract

In this paper, we present phase one of a three-phase project. The objective of the project is to design, develop and implement a flexible programmable video coprocessor. The processor targets applications for the MPEG format. Six basic processing tasks have been identified as the main job of the coprocessor. They contribute to a wide variety of operations frequently needed by multimedia applications. These tasks are resolution conversion, frame rate changing, quality and rate control (bits per pixel), filtering, video compositing and video cut detection. This phase presents a critical comprehensive study of the algorithms capable of performing these operations in the DCT domain. Two cases were considered with and without motion compensation. This phase is an essential step for laying down the architecture of different modules and achieving the most efficient implementation. Included in this paper too, are the design philosophy that has been adopted, the design objectives that were set and the outline of the coprocessor building blocks along with their interactions. Phase two will cover the details of the coprocessor design and, finally, phase three will be the actual implementation and testing of the chip.

Paper Details

Date Published: 21 December 1998
PDF: 11 pages
Proc. SPIE 3655, Media Processors 1999, (21 December 1998); doi: 10.1117/12.334761
Show Author Affiliations
Ahmed M. Darwish, Cairo Univ. (Egypt)

Published in SPIE Proceedings Vol. 3655:
Media Processors 1999
Sethuraman Panchanathan; Subramania I. Sudharsanan; V. Michael Bove, Editor(s)

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