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Proceedings Paper

Efficient modeling architecture for real-time content-based arithmetic coding
Author(s): Hao-Chieh Chang; Liang-Gee Chen
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Paper Abstract

In this paper, we describe an efficient modeling architecture for the content-based arithmetic coding on bi-level image. The architecture uses a delay-line buffer to maintain the input pixels such that the pixels in the buffer can be efficiently re-used. Besides, the delay-line buffer can be easily extended and reconfigure for constructing various 'contents.' The experimental result shows that the bottleneck resulting from constructing content for each pixel in a bi-level image can be overcome by the proposed architecture.

Paper Details

Date Published: 28 December 1998
PDF: 8 pages
Proc. SPIE 3653, Visual Communications and Image Processing '99, (28 December 1998); doi: 10.1117/12.334722
Show Author Affiliations
Hao-Chieh Chang, National Taiwan Univ. (Taiwan)
Liang-Gee Chen, National Taiwan Univ. (Taiwan)


Published in SPIE Proceedings Vol. 3653:
Visual Communications and Image Processing '99
Kiyoharu Aizawa; Robert L. Stevenson; Ya-Qin Zhang, Editor(s)

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