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Proceedings Paper

Using the KressArray for reconfigurable computing
Author(s): Reiner W. Hartenstein; Michael Herz; Thomas Hoffmann; Ulrich Nageldinger
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Paper Abstract

Multimedia applications commonly require high computation power mostly in conjunction with high data throughput. As an additional challenge, such applications are increasingly used in handheld devices, where also small package outlines and low power aspects are important. Many research approaches have shown, that accelerators based on reconfigurable hardware can satisfy those performance demands. Most of these approaches use commercial fine- grained FPGAs to implement reconfigurable accelerators. However, it has shown, that these devices are not always well suited for reconfigurable computing. The drawbacks here are the area-inefficiency and the insufficiency of the available design-tools. Besides the fine-grained FPGAs, coarse-grained reconfigurable architectures have been developed, which are more area efficient and better suited for computational purposes. In this paper, an implementation of such an architecture, the KressArray, is introduced and its use in the Map-oriented Machine with Parallel Data Access (MoM-PDA) is shown. The MoM-PDA is an FPGA-based custom computing machine, which is able to perform concurrent memory accesses by means of a dedicated memory organization scheme. The benefits of this architecture are illustrated by an application example.

Paper Details

Date Published: 8 October 1998
PDF: 12 pages
Proc. SPIE 3526, Configurable Computing: Technology and Applications, (8 October 1998); doi: 10.1117/12.327029
Show Author Affiliations
Reiner W. Hartenstein, Univ. of Kaiserslautern (Germany)
Michael Herz, Univ. of Kaiserslautern (Germany)
Thomas Hoffmann, Univ. of Kaiserslautern (Germany)
Ulrich Nageldinger, Univ. of Kaiserslautern (Germany)


Published in SPIE Proceedings Vol. 3526:
Configurable Computing: Technology and Applications
John Schewel, Editor(s)

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