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Proceedings Paper

Comparing computing machines
Author(s): Andre DeHon
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Paper Abstract

Reconfigurable computing devices are emerging as a viable alternative to fixed-function components and programmable processors. To expand our knowledge of the role and optimization of these devices, it is increasingly imperative for us to compare implementations of tasks and subroutines across this wide spectrum of implementation options. The fact that most processors, FPGAs, ASICs, and memories are fabricated in a uniform technology medium, CMOS VLSI, where area scaling is moderately well understood eases our comparison task. Nonetheless, the rapid pace of technology, limited device size selection, and economic artifacts complicate the picture. In this paper, we look at the task of comparing computing machines, reviewing normalization techniques and many important issues which arise during comparisons. This paper includes examples intended to underscore the methodology and comparison issues, but does not attempt to make definitive conclusions about the merits of the technology alternatives from the small sample set. The immediate intent of this work is to help designers faced with tradeoffs between technological alternatives. The longer term intent is to help the community collect and analyze the broad-based data needed to better understand the range of available computing options.

Paper Details

Date Published: 8 October 1998
PDF: 10 pages
Proc. SPIE 3526, Configurable Computing: Technology and Applications, (8 October 1998); doi: 10.1117/12.327025
Show Author Affiliations
Andre DeHon, Univ. of California/Berkeley (United States)


Published in SPIE Proceedings Vol. 3526:
Configurable Computing: Technology and Applications
John Schewel, Editor(s)

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