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Proceedings Paper

Probe microloading effect of in-situ etch in EPROM stack-gate process
Author(s): Jang Ming Chiou; Sheng Liang Pan; Kai Ming Ching; Bi-Jiang Chang; Kuo-Liang Lu
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Paper Abstract

An unpredictable significant microloading effect occurs between array and low photoresist ratio area when C2F6Cl2 and HBr are used as etch gas to define EPROM stack gate. Although we have examined etch time for array is enough, much poly residue still exist on those test keys with low photoresist ratio areas that lead to failure of electric parameter. On array area, polymer formed from C2F6 reactant gas trends to accumulate upon side-wall. Oppositely on the low photoresist area, there is almost not nay side-wall that can offer the medium absorbed by polymer. It will fall down and deposits upon poly surface. That will be a barrier. In the beginning, sufficient etch time often result from under- etch issue. We have modified etch time to get best optimal condition. Now, this issue does not occur any more.

Paper Details

Date Published: 28 August 1998
PDF: 6 pages
Proc. SPIE 3510, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis IV, (28 August 1998); doi: 10.1117/12.324386
Show Author Affiliations
Jang Ming Chiou, Taiwan Semiconductor Manufacturing Co. (Taiwan)
Sheng Liang Pan, Taiwan Semiconductor Manufacturing Co. (Taiwan)
Kai Ming Ching, Taiwan Semiconductor Manufacturing Co. (Taiwan)
Bi-Jiang Chang, Taiwan Semiconductor Manufacturing Co. (Taiwan)
Kuo-Liang Lu, Taiwan Semiconductor Manufacturing Co. (Taiwan)

Published in SPIE Proceedings Vol. 3510:
Microelectronic Manufacturing Yield, Reliability, and Failure Analysis IV
Sharad Prasad; Hans-Dieter Hartmann; Tohru Tsujide, Editor(s)

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