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Proceedings Paper

Yield improvement via automatic analysis of wafer-processing order
Author(s): Miguel Alonso Merino; Miguel Recio; Julian Moreno; Victorino Martin Santamaria; Almudena Fernandez; Gerardo Gonzalez; Enrique Borrego; Luis J. Barrios; Maria D. del Castillo; Lissette Lemus; Angel L. Gonzalez
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Paper Abstract

Manufacturing tools may process wafers in different fashions: by group of lots, by lot, by group of wafers, one- by-one in single or multichamber tools,... The order sequence in which wafers are processed in a given step of the manufacturing routing can be used as a valuable source for yield improvement. Within this scope we published on SPIE's 1996 Microelectronic Manufacturing an Advanced Software System to correlate order-sequences versus any yield related metric. Since then we have developed a new generation of Software named POSISCAN which automates the analysis and detection of 'order patterns', that is, footprints of the yield being impacted by the order in which the wafers were processed in a specific tool. Yield degradation induced on each process can have a kind of footprint. We have accumulated a wealth of these footprints and developed a very fine knowledge-based algorithm to automatically detect them on every lot. The effectiveness of this automated POSISCAN tool is remarkably high and is having a big impact on time to detection/analysis/root-cause of yield loss.

Paper Details

Date Published: 28 August 1998
PDF: 12 pages
Proc. SPIE 3510, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis IV, (28 August 1998); doi: 10.1117/12.324372
Show Author Affiliations
Miguel Alonso Merino, Lucent Technologies Microelectronica (Spain)
Miguel Recio, Lucent Technologies Microelectronica (Spain)
Julian Moreno, Lucent Technologies Microelectronica (Spain)
Victorino Martin Santamaria, Lucent Technologies Microelectronica (Spain)
Almudena Fernandez, Lucent Technologies Microelectronica (Spain)
Gerardo Gonzalez, Lucent Technologies Microelectronica (Spain)
Enrique Borrego, Lucent Technologies Microelectronica (Spain)
Luis J. Barrios, Instituto de Automatica Industrial (Spain)
Maria D. del Castillo, Instituto de Automatica Industrial (Spain)
Lissette Lemus, Instituto de Automatica Industrial (Spain)
Angel L. Gonzalez, Instituto de Automatica Industrial (Spain)


Published in SPIE Proceedings Vol. 3510:
Microelectronic Manufacturing Yield, Reliability, and Failure Analysis IV
Sharad Prasad; Hans-Dieter Hartmann; Tohru Tsujide, Editor(s)

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