Share Email Print

Proceedings Paper

Influence of topographical variations on reliable via and contact formation
Author(s): Jerry T. Healey; Scott E. Rubel
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

The continuing trend toward smaller device feature sizes and the associated use of high numerical aperture lenses has decreased the depth-of-focus budget available to resolve critical vias. This problem is aggravated by localized topographical variations in device structure, such as double poly capacitors or EEPROM structures, which can induce excessive vertical variation in via height. Such variation places severe demands on the available focus beget, and can result in localized regions of the die experiencing incompletely formed via structures. Topographical variations in device structure can also induce highly isolated and incompletely formed active area contacts as a result of localized resist pooling. In this situation, the topography usually consists of large double poly structures which surround an active area contact, and induce a dramatic variation in resist thickness over the contact area. This can lead to incompletely formed active area contacts and device failure. In both cases, topography play has a key role in inducing these failures mechanisms. This paper presents two case studies: one involving incompletely formed vias due to topographically induced focus failure, and the other a case study involving a EEPROM contact failure caused by topographically induced resists pooling.

Paper Details

Date Published: 3 September 1998
PDF: 15 pages
Proc. SPIE 3507, Process, Equipment, and Materials Control in Integrated Circuit Manufacturing IV, (3 September 1998); doi: 10.1117/12.324335
Show Author Affiliations
Jerry T. Healey, Motorola (United States)
Scott E. Rubel, Motorola (United States)

Published in SPIE Proceedings Vol. 3507:
Process, Equipment, and Materials Control in Integrated Circuit Manufacturing IV
Anthony J. Toprac; Kim Dang, Editor(s)

© SPIE. Terms of Use
Back to Top