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Proceedings Paper

Microprocessor technology challenges through the next decade
Author(s): George E. Sery
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Paper Abstract

Historical microprocessor product trends show an increase in product frequency of 1.25X per year and a transistor count increase of 1.4X per year since the early 70s. This trend is forecast to continue over the next decade to the 0.07 micrometer generation. To support the trend, challenges in lithography, transistor definition, interconnect system, and manufacturability must be overcome. Solutions to the lithography challenge, will require successful implementation of 157 nm optical or next generation lithography (NGL). The transistor solution will require integration of sub 2.0 nm gate oxides with improved gate electrode materials, improved low resistance shallow source-drain technology, advanced channel dopant engineering and operation at or below 1.0 v. Interconnect challenges will require support of 10 or more interconnect layers using low resistivity metalization and reduced epsilon dielectric. Manufacturing challenges require support of larger die sizes, integrated at higher technology complexity, while maintaining lowest possible cost.

Paper Details

Date Published: 4 September 1998
PDF: 6 pages
Proc. SPIE 3508, Multilevel Interconnect Technology II, (4 September 1998); doi: 10.1117/12.324034
Show Author Affiliations
George E. Sery, Intel Corp. (United States)

Published in SPIE Proceedings Vol. 3508:
Multilevel Interconnect Technology II
Mart Graef; Divyesh N. Patel, Editor(s)

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