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Proceedings Paper

Integration of hydrogen silsesquioxane into an advanced BiCMOS process
Author(s): Michael Olewine; Ralph N. Wall; Gus J. Colovos
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Paper Abstract

Performance of advanced integrated circuit (IC) technology is becoming dominated by interconnect RC propagation delays making the introduction of lower capacitance insulators very attractive. The use of low dielectric constant (low-k) materials will be a key challenge for future interconnect technologies. In the case of BiCMOS technology for RF applications, an additional consideration is to minimize parasitic capacitance of passive components such as inductors, buses, and bond pads. The use of hydrogen silsesquioxane (HSQ) with a dielectric constant of about 3.0 allowed the construction of high quality spiral inductors in a 0.5 micrometer BiCMOS technology. In addition to its low-k properties, the HSQ spin-on dielectric was used for planarization of three polycrystalline silicon layers and four levels of metal interconnects. The HSQ layer was applied in a single coat application in a non-etchback process that achieved excellent planarity with good crack resistance. The stability of blanket HSQ films was shown using FTIR spectra, film stress, and capacitance data. Immunity of devices to hot carrier lifetime degradation was demonstrated. Low resistance and high yield for long metal via chains were obtained by careful integration of the via etch, resist strip and metal deposition processes. Thus we demonstrated the integration of HSQ planarization into an advanced BiCMOS process to take advantage of its excellent planarity and its low dielectric constant.

Paper Details

Date Published: 4 September 1998
PDF: 9 pages
Proc. SPIE 3508, Multilevel Interconnect Technology II, (4 September 1998); doi: 10.1117/12.324032
Show Author Affiliations
Michael Olewine, Philips Semiconductors (United States)
Ralph N. Wall, Philips Semiconductors (United States)
Gus J. Colovos, Philips Semiconductors (United States)

Published in SPIE Proceedings Vol. 3508:
Multilevel Interconnect Technology II
Mart Graef; Divyesh N. Patel, Editor(s)

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