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Proceedings Paper

Motion vector estimation on focal sensor plane by block matching
Author(s): Zheng Li; Kiyoharu Aizawa; Mitsutoshi Hatori
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Paper Abstract

In this paper, a fast-2D motion vector estimation on the CMOS sensor focal plane is proposed. Edge detection circuit composed of 2 crossed differential OTAs with Time- Multiplexed sampling is adopted for getting horizontal and vertical edges. Short-time digital memory is designed by transmission gate array, which can keep edge information by a smaller layout area. High speed block matching is designed by a Local Parallel and Global Column Parallel processing structure, which fully makes use of the parallel nature of image signals. The size of block matching can be reduced to 4 by 4 pixels and a search area of +/- 1 pixel around the intentional block at a high frame rate of 1000 frame/s. The prototype chip is designed by 1-poly 2-metal 0.7 micrometers CMOS process.

Paper Details

Date Published: 7 September 1998
PDF: 7 pages
Proc. SPIE 3410, Advanced Focal Plane Arrays and Electronic Cameras II, (7 September 1998); doi: 10.1117/12.324002
Show Author Affiliations
Zheng Li, Univ. of Tokyo (Japan)
Kiyoharu Aizawa, Univ. of Tokyo (Japan)
Mitsutoshi Hatori, Univ. of Tokyo (Japan)

Published in SPIE Proceedings Vol. 3410:
Advanced Focal Plane Arrays and Electronic Cameras II
Thierry M. Bernard, Editor(s)

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