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Proceedings Paper

Remote plasma nitrided oxides for ultrathin gate dielectric applications
Author(s): Sunil Hattangady; D. T. Grider; Robert Kraft; Wei-Tsun Shiau; Monte A. Douglas; P. Nicollian; Mark Rodder; George A. Brown; Amitava Chatterjee; Jerry C. Hu; S. Aur; H.-L. Tsai; R. A. Chapman; R. H. Eklund; Ih-Chin Chen; Mike F. Pas
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Paper Abstract

Two major concerns for ultrathin gate dielectric films have emerged with device scaling for CMOS devices: (1) B penetration in PMOS devices from the p+ boron-doped gate electrodes into the oxide and the underlying Si, (2) and increase in gate leakage current with decreasing oxide thickness. Oxynitride, nitride, and stacked nitride-oxide gate dielectrics have been proposed to overcome the above hurdles. Remote-plasma nitrided oxides (RPNO), involving nitridation of thermally grown oxides with a remote high-density nitrogen discharge, have emerged as promising candidates for ultrathin gate dielectric applications. These dielectrics are comprised of a thin layer of uniform and high N concentration at the poly/dielectric interface for an effective barrier to suppress B diffusion, and do not show the typical mobility and transconductance degradation observed (particularly in PMOS devices) with thermally grown oxynitride and nitride films. No increase in defect tail populations is observed from the nitridation. For stacked nitride-oxide films formed with this approach, a 10X reduction in gate leakage current is observed for Tox,eqapproximately 2 nm. In applications involving metal gate electrodes, the RPNO films show significant reliability improvements over conventional oxides, attesting to potential advantages in preventing detrimental gate electrode/dielectric interactions. The potential advantages of such a gate dielectric scaling approach lie in: (1) the ability to start with a relatively thicker oxide where thickness targeting and process control is easier, (2) an essentially self-limiting process leading to 'built-in' uniformity of that of starting oxide, (3) the ability to control the thickness of the nitride layer and the spatial distribution of N, (4) adaptability/flexibility for integration with conventional oxide processing including cluster-tool processing, and (5) potential for scalability beyond the 0.10 micrometer technology node.

Paper Details

Date Published: 4 September 1998
PDF: 11 pages
Proc. SPIE 3506, Microelectronic Device Technology II, (4 September 1998); doi: 10.1117/12.323956
Show Author Affiliations
Sunil Hattangady, Texas Instruments Inc. (United States)
D. T. Grider, Texas Instruments Inc. (United States)
Robert Kraft, Texas Instruments Inc. (United States)
Wei-Tsun Shiau, Texas Instruments Inc. (United States)
Monte A. Douglas, Texas Instruments Inc. (United States)
P. Nicollian, Texas Instruments Inc. (United States)
Mark Rodder, Texas Instruments Inc. (United States)
George A. Brown, Texas Instruments Inc. (United States)
Amitava Chatterjee, Texas Instruments Inc. (United States)
Jerry C. Hu, Texas Instruments Inc. (United States)
S. Aur, Texas Instruments Inc. (United States)
H.-L. Tsai, Texas Instruments Inc. (United States)
R. A. Chapman, Texas Instruments Inc. (United States)
R. H. Eklund, Texas Instruments Inc. (United States)
Ih-Chin Chen, Texas Instruments Inc. (United States)
Mike F. Pas, Texas Instruments Inc. (United States)


Published in SPIE Proceedings Vol. 3506:
Microelectronic Device Technology II
David Burnett; Dirk Wristers; Toshiaki Tsuchiya, Editor(s)

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