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Proceedings Paper

Real-time image histogram equalization using FPGA
Author(s): Xiying Li; GuoQiang Ni; Yanmei Cui; Tian Pu; Yanli Zhong
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Paper Abstract

A new hardware implementation of histogram equalization by means of Field Programmable Gate Array (FPGA) is presented. Histogram equalization is an effective means of image enhancement. Its real-time processing requires a great deal of memory and very high processing speed. The logic cell nature of XC4000 family's FPGA is most suitable for performing real-time pixel-level image processing operations such as histogram equalization. A core is constructed to complete this histogram statistics and histogram equalization. As a result, the chip makes circuits and system more effective than ever, and it takes very short time to complete the calculation and generate the look-up table. The equalizing technique is described and implementation results using a Xilinx XC4010 FPGA are presented.

Paper Details

Date Published: 19 August 1998
PDF: 7 pages
Proc. SPIE 3561, Electronic Imaging and Multimedia Systems II, (19 August 1998); doi: 10.1117/12.319719
Show Author Affiliations
Xiying Li, Beijing Institute of Technology (China)
GuoQiang Ni, Beijing Institute of Technology (China)
Yanmei Cui, Beijing Institute of Technology (China)
Tian Pu, Beijing Institute of Technology (China)
Yanli Zhong, Beijing Institute of Technology (China)


Published in SPIE Proceedings Vol. 3561:
Electronic Imaging and Multimedia Systems II
LiWei Zhou; Chung-Sheng Li, Editor(s)

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