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Proceedings Paper

Inorganic bottom ARC SiOxNy for interconnection levels on 0.18-um technology
Author(s): Yorick Trouiller; N. Buffet; Thierry Mourier; Yveline Gobil; Patrick Schiavone; Yves Quere
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Paper Abstract

BARC technology, originally developed for gate level has now to be applied to interconnection one's. Requirements for dielectric interconnection levels are different from gate level. In the case of gate level ARC has to minimize reflectivity at resist/substrate interface due to notching and resist swing curve effects. Whereas ARC for interconnections has to minimize reflectivity variation at resist/substrate interface due to swing curve effect in the dielectric layer. For interconnection, ARC must be as absorbent as possible at stepper exposure wavelength, and two ways are foreseen: ARC layer with high k value at 248 nm, and ARC layer with high thickness. For a reflectivity variation minimum criteria, we can find a couple values (k, minimum thickness). Experiments give us for a reflectivity variation below 5% the following couples: (k equals 0.7, 1200 angstroms thickness) and (k equals 1.1, 850 angstroms). In this paper we describe different applications of SiOxNy for interconnection levels: via, contact and damascene line level. Improvements depending of the SiOxNy thickness are seen in CD dispersion. To conclude SiOxNy ARC can be used for interconnection levels, and its performance depends on ARC couple values (k, thickness).

Paper Details

Date Published: 29 June 1998
PDF: 10 pages
Proc. SPIE 3333, Advances in Resist Technology and Processing XV, (29 June 1998); doi: 10.1117/12.312422
Show Author Affiliations
Yorick Trouiller, CEA-LETI (France)
N. Buffet, CEA-LETI (France)
Thierry Mourier, CEA-LETI (France)
Yveline Gobil, CEA-LETI (France)
Patrick Schiavone, France Telecom CNET (France)
Yves Quere, CEA-LETI (France)

Published in SPIE Proceedings Vol. 3333:
Advances in Resist Technology and Processing XV
Will Conley, Editor(s)

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