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Proceedings Paper

Can sub-0.18-μm FEOL be realized in production with KrF DUV?
Author(s): Wendy F.J. Gehoel-van Ansem; Peter Zandbergen; Jos de Klerk
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Paper Abstract

In this paper, (sub) 0.18 micrometers KrF DUV processes are optimized for logic Front-End-Of-Line (FEOL) CMOS applications. A commercial DUV resist is used without resolution enhancement techniques such as phase-shift masks and off-axis illumination. The full patterning process is considered, i.e., in the final optimized process account is taken of the etch process. Statistical data shows that a stable process was obtained. However, due to minimal process windows at gate level after poly-etch, 0.18 micrometers FEOL cannot be realized in production with KrF DUV.

Paper Details

Date Published: 29 June 1998
PDF: 12 pages
Proc. SPIE 3333, Advances in Resist Technology and Processing XV, (29 June 1998); doi: 10.1117/12.312420
Show Author Affiliations
Wendy F.J. Gehoel-van Ansem, Philips Research Labs. (Netherlands)
Peter Zandbergen, Philips Research Labs. (Netherlands)
Jos de Klerk, Philips Semiconductors (Netherlands)


Published in SPIE Proceedings Vol. 3333:
Advances in Resist Technology and Processing XV
Will Conley, Editor(s)

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