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Proceedings Paper

Chip-scale 3D topography synthesis
Author(s): Mariusz Niewczas; Xiaolei Li; Andrzej J. Strojwas; Wojciech P. Maly
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Paper Abstract

We propose a novel approach to perform the chip scale mask to topography mapping by building a library of repetitive mask patterns. We call them vicinity patterns. They describe a collection of mask features in close proximity. This pattern library is used to synthesize 3-D topography of an arbitrary part of the chip topography. We define some process-related parameters, which we call critical interaction lengths, as a basis for mask decomposition into the vicinity patterns.

Paper Details

Date Published: 29 June 1998
PDF: 10 pages
Proc. SPIE 3334, Optical Microlithography XI, (29 June 1998); doi: 10.1117/12.310811
Show Author Affiliations
Mariusz Niewczas, Carnegie Mellon Univ. (United States)
Xiaolei Li, Carnegie Mellon Univ. (United States)
Andrzej J. Strojwas, Carnegie Mellon Univ. (United States)
Wojciech P. Maly, Carnegie Mellon Univ. (United States)


Published in SPIE Proceedings Vol. 3334:
Optical Microlithography XI
Luc Van den Hove, Editor(s)

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