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Proceedings Paper

Design of parallel optical highways for interconnecting electronics
Author(s): Neil McArdle; Stuart J. Fancey; Julian A. B. Dines; John Fraser Snowdon; Masatoshi Ishikawa; Andrew C. Walker
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Paper Abstract

The increasingly high performance of electronic processors will place a burden on data communications in future systems. High speed and dense interconnections will be needed at various levels of a system hierarchy: among gates on a chip; among chips on a multi-chip module (MCM); among chips or MCMs on a board, and among boards via a backplane.

Paper Details

Date Published: 22 May 1998
PDF: 4 pages
Proc. SPIE 3490, Optics in Computing '98, (22 May 1998); doi: 10.1117/12.308907
Show Author Affiliations
Neil McArdle, Heriot-Watt Univ. (United Kingdom)
Stuart J. Fancey, Heriot-Watt Univ. (United Kingdom)
Julian A. B. Dines, Heriot-Watt Univ. (United Kingdom)
John Fraser Snowdon, Heriot-Watt Univ. (United Kingdom)
Masatoshi Ishikawa, Univ. of Tokyo (Japan)
Andrew C. Walker, Heriot-Watt Univ. (United Kingdom)


Published in SPIE Proceedings Vol. 3490:
Optics in Computing '98
Pierre H. Chavel; David A. B. Miller; Hugo Thienpont, Editor(s)

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