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Proceedings Paper

Free-space architecture for an ATM header processing function
Author(s): Guido A. Maier; Pierpaolo Boffi; Riccardo Melen; Mario Martinelli
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Paper Abstract

Header Error Control in all-optical ATM switching nodes is discussed. An architecture of an error detection subsystem is designed suitable for free-space parallel optical implementation.

Paper Details

Date Published: 22 May 1998
PDF: 4 pages
Proc. SPIE 3490, Optics in Computing '98, (22 May 1998); doi: 10.1117/12.308902
Show Author Affiliations
Guido A. Maier, CoreCom (Italy)
Pierpaolo Boffi, CoreCom (Italy)
Riccardo Melen, Politecnico di Milano (Italy)
Mario Martinelli, Politecnico di Milano (Italy)

Published in SPIE Proceedings Vol. 3490:
Optics in Computing '98
Pierre H. Chavel; David A. B. Miller; Hugo Thienpont, Editor(s)

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