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Proceedings Paper

3D optoelectronic stacked processors: design and analysis
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Paper Abstract

We present the design and analysis of a 3D OptoElectronic Stacked Processor System. This system is aimed at combining stacked VLSI chips with free-space optoelectronic Inputs and Outputs for optimal power*volume/throughput balance. Challenges in such systems include finding appropriate thermal extraction schemes, packaging and alignment of the multiple stacks, and appropriate micro-optical and optoelectronic component design.

Paper Details

Date Published: 22 May 1998
PDF: 5 pages
Proc. SPIE 3490, Optics in Computing '98, (22 May 1998); doi: 10.1117/12.308872
Show Author Affiliations
Sadik C. Esener, Univ. of California/San Diego (United States)
Philippe J. Marchand, Univ. of California/San Diego (United States)


Published in SPIE Proceedings Vol. 3490:
Optics in Computing '98
Pierre H. Chavel; David A. B. Miller; Hugo Thienpont, Editor(s)

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