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Proceedings Paper

Developing a method to determine linewidth based on counting the atom spacings across a line
Author(s): Richard M. Silver; Carsten P. Jensen; Vincent Wen-Chieh Tsai; Joseph Fu; John S. Villarrubia; E. Clayton Teague
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Paper Abstract

We are developing the instrumentation and prototype samples at NIST to enable the counting of atom-spacings across linewidth features etched in silicon. This is an effort to allow the accurate counting of atom-spacings across a feature in a controlled environment and to subsequently transfer that dimensionally stabilized artifact to other measuring instruments. In this paper we will describe the sample preparation techniques, sample configurations and imaging instrumentation used in this project. We have constructed a multi-chamber ultra-high vacuum (UHV) system with silicon processing capabilities which include the high temperature removal of native oxides and the appropriate temperature control and vacuum environment for preparing long range atomically ordered silicon surfaces. We can also passivate the silicon surfaces by oxidation in a temperature and pressure controlled environment or simply allow a native oxide to grow in an air ambient. This facility has a scanning tunneling microscope (STM) with atomic lateral imaging capabilities and a 0.2 angstrom vertical noise floor. The loadlock chamber allows rapid transfer of multiple tips and samples into the UHV environment. The facility is additionally equipped with a field-ion/field-electron microscope (FIFEM) which can atomically image, measure, and prepare the STM tips. The FIFEM enables the use of STM tips of known dimensions and cleanliness on a regular basis.

Paper Details

Date Published: 8 June 1998
PDF: 20 pages
Proc. SPIE 3332, Metrology, Inspection, and Process Control for Microlithography XII, (8 June 1998); doi: 10.1117/12.308754
Show Author Affiliations
Richard M. Silver, National Institute of Standards and Technology (United States)
Carsten P. Jensen, Danish Institute of Fundamental Metrology (Denmark)
Vincent Wen-Chieh Tsai, National Institute of Standards and Technology (United States)
Joseph Fu, National Institute of Standards and Technology (United States)
John S. Villarrubia, National Institute of Standards and Technology (United States)
E. Clayton Teague, National Institute of Standards and Technology (United States)


Published in SPIE Proceedings Vol. 3332:
Metrology, Inspection, and Process Control for Microlithography XII
Bhanwar Singh, Editor(s)

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