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Proceedings Paper

Rapid yield learning through optical defect and electrical test analysis
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Paper Abstract

As semiconductor device density and wafer area continue to increase, the volume of in-line and off-line data required to diagnose yield-limiting conditions is growing exponentially. To manage this data in the future, analysis tools will be required that can automatically reduce this data to useful information, e.g., by assisting the engineer in rapid root- cause diagnosis of defect generating mechanisms. In this paper, we describe a technology known as Spatial Signature Analysis (SSA) and its application to both optically-detected defect data as well as electrical test (e-test) bin data. The results of a validation study are summarized that demonstrate the effectiveness of the SSA approach on optical defect wafermaps through field-testing at three semiconductor manufacturing sites on ASIC, DRAM and SRAM products. This method has been extended to analyze and interpret electrical test data and to provide a pathway for correlation of this data with in-line optical measurements. The image processing- based, fuzzy classifier system used for optical defect SSA has been adopted and applied to e-test binmaps to interpret and rapidly identify characteristic patterns, or 'signatures,' in the binmap data that are uniquely associated with the manufacturing process. An image of the binmap is created, and features such as mass, simple moments, and invariant moments are extracted and presented to a pair-wise, fuzzy, k-NN classifier. The preliminary performance results show an 84% correct e-test signature classification rate, even under sub- optimal training conditions.

Paper Details

Date Published: 8 June 1998
PDF: 11 pages
Proc. SPIE 3332, Metrology, Inspection, and Process Control for Microlithography XII, (8 June 1998); doi: 10.1117/12.308731
Show Author Affiliations
Shaun S. Gleason, Oak Ridge National Lab. (United States)
Kenneth W. Tobin, Oak Ridge National Lab. (United States)
Thomas P. Karnowski, Oak Ridge National Lab. (United States)
Fred Lakhani, SEMATECH (United States)


Published in SPIE Proceedings Vol. 3332:
Metrology, Inspection, and Process Control for Microlithography XII
Bhanwar Singh, Editor(s)

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