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Proceedings Paper

Planarization techniques for MEMS: enabling new structures and enhancing manufacturability
Author(s): James H. Smith
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Paper Abstract

Planarization techniques such as chemical-mechanical polishing (CMP) have emerged as enabling technologies for the manufacturing of multi-level metal interconnects used in high-density Integrated Circuits (IC). An overview of general planarization techniques for MicroElectroMechanical Systems (MEMS) and, in particular, the extension of CMP from sub-micron IC manufacturing to the fabrication of complex surface-micromachined MEMS will be presented. Planarization technique alleviates processing problems associated with fabrication of multi-level polysilicon structures, eliminates design constraints linked with non-planar topography, and provides an avenue for integrating different process technologies. The CMP process and present examples of the use of CMP in fabricating MEMS devices such as microengines, pressure sensors, and proof masses for accelerometers along with its use for monolithically integrating MEMS devices with microelectronics are presented.

Paper Details

Date Published: 16 April 1998
PDF: 10 pages
Proc. SPIE 3321, 1996 Symposium on Smart Materials, Structures, and MEMS, (16 April 1998); doi: 10.1117/12.305615
Show Author Affiliations
James H. Smith, Sandia National Labs. (United States)


Published in SPIE Proceedings Vol. 3321:
1996 Symposium on Smart Materials, Structures, and MEMS
Vasu K. Aatre; Vijay K. Varadan; Vasundara V. Varadan, Editor(s)

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