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Proceedings Paper

Development of advanced second-generation micromirror devices fabricated in a four-level planarized surface-micromachined polycrystalline silicon process
Author(s): M. Adrian Michalicek; John H. Comtois; Heather K. Schriner
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Paper Abstract

This paper describes the design and characterization of several types of micromirror devices to include process capabilities, device modeling, and test data resulting in deflection versus applied potential curves and surface contour measurements. These devices are the first to be fabricated in the state-of-the-art four-level planarized polysilicon process available at Sandia National Laboratories known as the Sandia Ultra-planar Multi-level MEMS Technology. This enabling process permits the development of micromirror devices with near-ideal characteristics which have previously been unrealizable in standard three-layer polysilicon processes. This paper describes such characteristics which have previously been unrealizable in standard three-layer polysilicon processes. This paper describes such characteristics as elevated address electrodes, various address wiring techniques, planarized mirror surfaces suing Chemical Mechanical Polishing, unique post-process metallization, and the best active surface area to date.

Paper Details

Date Published: 20 April 1998
PDF: 10 pages
Proc. SPIE 3292, Spatial Light Modulators, (20 April 1998); doi: 10.1117/12.305509
Show Author Affiliations
M. Adrian Michalicek, Air Force Research Lab. (United States)
John H. Comtois, Air Force Research Lab. (United States)
Heather K. Schriner, Sandia National Labs. (United States)


Published in SPIE Proceedings Vol. 3292:
Spatial Light Modulators
Richard L. Sutherland, Editor(s)

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