Share Email Print
cover

Proceedings Paper

Attenuated phase-shift masks reducing side-lobe effect in DRAM peripheral circuit region
Author(s): Haruo Iwasaki; Keiichi Hoshi; Hiroyoshi Tanabe; Kunihiko Kasama
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

We applied deep UV attenuated phase shift masks (PSMs) to the quarter micron level contact hole pattern layer of a DRAM. There were two different hole sizes: 0.26 micrometer hole in the memory cell region, and 0.35 micrometer in the peripheral circuit region. We examined two methods to reduce the side lobe effects in the peripheral circuit region. The first method was a chrome (Cr) shield method: the peripheral circuit region was covered by Cr. The second method was a mask bias method: large mask bias was added to contact hole patterns in memory cells. Both methods sufficiently reduced the side lobe effect in the peripheral circuit region.

Paper Details

Date Published: 12 February 1997
PDF: 7 pages
Proc. SPIE 3236, 17th Annual BACUS Symposium on Photomask Technology and Management, (12 February 1997); doi: 10.1117/12.301229
Show Author Affiliations
Haruo Iwasaki, NEC Corp. (Japan)
Keiichi Hoshi, NEC Corp. (Japan)
Hiroyoshi Tanabe, NEC Corp. (Japan)
Kunihiko Kasama, NEC Corp. (Japan)


Published in SPIE Proceedings Vol. 3236:
17th Annual BACUS Symposium on Photomask Technology and Management
James A. Reynolds; Brian J. Grenon, Editor(s)

© SPIE. Terms of Use
Back to Top