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Proceedings Paper

Fast IP routing with VC-merge-capable ATM switches
Author(s): Indra Widjaja; Anwar I. Elwalid
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Paper Abstract

Recent work on building fast IP routers has emphasized on integrating ATM switching with IP routing. One critical issue is concerned with ways to map IP routing information to ATM labels. VC merging allows many routes to be mapped to the same VC label, thereby providing a scalable mapping method that can support tens of thousands of edge routers. VC merging requires reassembly buffers so that cells belonging to different packets intended for the same destination do not interleave with each other. We investigate the impact of VC merging on the additional buffer required for the reassembly buffers and other buffers due to the perturbation in the traffic process. The main result indicates that VC merging incurs a minimal overhead compared to non-VC merging in terms of additional buffering. Moreover, the overhead decreases as utilization increases, or as the traffic becomes more bursty.

Paper Details

Date Published: 6 October 1997
PDF: 12 pages
Proc. SPIE 3233, Broadband Networking Technologies, (6 October 1997); doi: 10.1117/12.290481
Show Author Affiliations
Indra Widjaja, Univ. of Arizona (United States)
Anwar I. Elwalid, Lucent Technologies Bell Labs. (United States)

Published in SPIE Proceedings Vol. 3233:
Broadband Networking Technologies
Seyhan Civanlar; Indra Widjaja, Editor(s)

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