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Proceedings Paper

Implementation of scheduling schemes using a sequencer circuit
Author(s): Massoud R. Hashemi; Alberto Leon-Garcia
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Paper Abstract

The implementation of different well-known scheduling schemes using a cell sequencer/scheduler circuit, already proposed by the authors, is investigated. Two groups of scheduling schemes, namely priority-based and rate-based schemes are considered. The first group includes static and dynamic priority schemes such as head-of-line priority and windowed priority schemes. The second group includes fair queueing, self-clocked fair queueing, and pacing mechanisms. The application of the sequencer in shaping and policing circuits in ATM networks is also addressed. A mechanism of scheduling real-time and non-real-time traffics using two different algorithms but a common sequencer is also presented to demonstrate the capability of the sequencer to implement a combination of algorithms and functions in the same environment.

Paper Details

Date Published: 6 October 1997
PDF: 10 pages
Proc. SPIE 3233, Broadband Networking Technologies, (6 October 1997); doi: 10.1117/12.290470
Show Author Affiliations
Massoud R. Hashemi, Univ. of Toronto (Canada)
Alberto Leon-Garcia, Univ. of Toronto (Canada)


Published in SPIE Proceedings Vol. 3233:
Broadband Networking Technologies
Seyhan Civanlar; Indra Widjaja, Editor(s)

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