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Proceedings Paper

Coupling between hot-carrier degradation modes of pMOSFETs
Author(s): Vijay Janapaty; Bharat L. Bhuva; N. Bui; Sherra E. Kerns
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Paper Abstract

The hot-carrier degradation of pMOSFETs is affected by the sequence of bias conditions. Device parameter shifts under dynamic stresses can be different from those determined from DC stressing experiments. In particular, hole injection is enhanced when preceded by electron trapping, though subsequent electron trapping is not affected by hole injection. Sequences of electron trapping preceding hole injection and hole injection preceding electron trapping both enhance the rate of interface trap formation relative to that seen in single-bias, e.g. single-mode or DC, stressing experiments.

Paper Details

Date Published: 11 September 1997
PDF: 4 pages
Proc. SPIE 3216, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis III, (11 September 1997); doi: 10.1117/12.284695
Show Author Affiliations
Vijay Janapaty, Vanderbilt Univ. (United States)
Bharat L. Bhuva, Vanderbilt Univ. (United States)
N. Bui, Advanced Micro Devices, Inc. (United States)
Sherra E. Kerns, Vanderbilt Univ. (United States)

Published in SPIE Proceedings Vol. 3216:
Microelectronic Manufacturing Yield, Reliability, and Failure Analysis III
Ali Keshavarzi; Sharad Prasad; Hans-Dieter Hartmann, Editor(s)

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