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Proceedings Paper

Computer simulation for estimation of dislocation multiplication due to gravitational stress: challenges and opportunities toward slip-free 300-mm-diameter silicon wafers for ultralarge-scale integr
Author(s): Hirofumi Shimizu; Seiichi Isomae; Kyoko Minowa; Tomomi Satoh
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Paper Abstract

Considering the coming 300-mm-dia Si wafer era (beyond 0.25 - 0.18 micrometers design rule in MOS devices), occurrence of slip dislocations along <110> directions due to gravitational stress at supporting jigs is still one of the biggest crucial issues in manufacturing ultra-large-scale- integration circuits. This paper describes how to predict slip dislocation onset under gravitational stress upon heat- treating 300-mm-dia wafers. Gravitational stresses for 300- mm-dia wafers are computed using finite element method (COSMOS/M (SRAC Co.)) and converted to resolved shear stresses in {111} slip planes and <110> slip directions. Individual critical stress curves are independently obtained as a function of microdefect density on the basis of formerly proposed thermoelastic model. By comparing both results, conditions to suppress a collective thermoelastic model. By comparing both results, conditions to suppress a collective motion of dislocation due to both the gravitational stress and thermal stress in heat cycles are obtained and also as predictable in wafers larger than 300 mm in diameter. Concurrently, gravitational-stress- induced-dislocations were found to be running [110] direction on (111) or (--111) plane with length of 4 - 5 cm and analyzed to be 60 degree(s)-type in character, terminating at surface in screw-type.

Paper Details

Date Published: 2 September 1997
PDF: 13 pages
Proc. SPIE 3215, In-Line Characterization Techniques for Performance and Yield Enhancement in Microelectronic Manufacturing, (2 September 1997); doi: 10.1117/12.284678
Show Author Affiliations
Hirofumi Shimizu, Hitachi, Ltd. (Japan)
Seiichi Isomae, Hitachi, Ltd. (Japan)
Kyoko Minowa, Hitachi, Ltd. (Japan)
Tomomi Satoh, Hitachi ULSI Engineering Co. (Japan)


Published in SPIE Proceedings Vol. 3215:
In-Line Characterization Techniques for Performance and Yield Enhancement in Microelectronic Manufacturing
Damon K. DeBusk; Sergio A. Ajuria, Editor(s)

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