Share Email Print
cover

Proceedings Paper

Novel method to calculate the probability of silicon damage of DRAM based on the process control capability
Author(s): Mingchu King; Jen-Chih Leu; Shih-Shiung Chen; Ying-Chen Chao
Format Member Price Non-Member Price
PDF $17.00 $21.00

Paper Abstract

The method of calculating the defect probability of silicon damage is demonstrated in this paper. The calculated probability is based on the manufacturing capability of lithography and etching process on dimension and overlay control. An useful equation is derived to calculate the defect probability in silicon damage. This method is helpful on determining suitable process control specifications on dimension and overlay for defect reduction and yield improvement.

Paper Details

Date Published: 2 September 1997
PDF: 9 pages
Proc. SPIE 3215, In-Line Characterization Techniques for Performance and Yield Enhancement in Microelectronic Manufacturing, (2 September 1997); doi: 10.1117/12.284677
Show Author Affiliations
Mingchu King, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)
Jen-Chih Leu, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)
Shih-Shiung Chen, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)
Ying-Chen Chao, Taiwan Semiconductor Manufacturing Co., Ltd. (Taiwan)


Published in SPIE Proceedings Vol. 3215:
In-Line Characterization Techniques for Performance and Yield Enhancement in Microelectronic Manufacturing
Damon K. DeBusk; Sergio A. Ajuria, Editor(s)

© SPIE. Terms of Use
Back to Top