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Proceedings Paper

Plasma-induced metal sidewall undercut and its dependence on the layout geometry
Author(s): David Y. Hu; Alex Q. Zhang; Joseph Xie; Qian Yin; Shao Kai
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Paper Abstract

During the development of the 0.35 um logic process, a metal side wall undercut has been observed in the post etch cleaning step. The degree of the undercut has been found not only related to the use of the wet chemicals, but also on the layout structure and the subsequent plasma process steps. The sidewall undercut becomes significant if a metal line is in connection to metal pad(s) with adjacent isolated metal lines. It is also noted that if the metal line is in a close loop the side wall is also very susceptible for the damage. Charged induced electrolytic effect and the plasma non-uniformity as well as the local heat dissipation are suspected to be the key factors causing these post etch metal damage. In this paper, we use a specific testing structure with different area ratios to identify these causes and effects. Splits have been done between different wet polymer clean in combination of the plasma photoresist strip process steps. Sheet resistance and cross-sectional pictures are used as the reference to monitor the degree of damage. It was confirmed that though antenna structure is susceptible to this plasma induced electrolytic damage, with a careful selection of the wet chemical polymer clean and resist strip power, the damage can be eliminated.

Paper Details

Date Published: 5 September 1997
PDF: 6 pages
Proc. SPIE 3214, Multilevel Interconnect Technology, (5 September 1997); doi: 10.1117/12.284658
Show Author Affiliations
David Y. Hu, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Alex Q. Zhang, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Joseph Xie, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Qian Yin, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Shao Kai, Chartered Semiconductor Manufacturing Ltd. (Singapore)


Published in SPIE Proceedings Vol. 3214:
Multilevel Interconnect Technology
Divyesh N. Patel; Mart Graef, Editor(s)

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