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Proceedings Paper

Analysis on the metal etch resist selectivity measurement
Author(s): Vayalakkara Premachandran; Raymond Joy; Paul Kwok Keung Ho; Lee Wei Lok; Thomas Schuelke; Young Tsai
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Paper Abstract

Absence of a good resist selectivity is a key issue in the metal etch. It becomes increasingly critical when the geometry shrinks below the sub-half micron and the resist thickness reduces further for lithography to get smaller features resolved. Measured values are often quoted based on various techniques like surface profiler or cross section analysis, etc. For a multi step etch recipe we analyzed step by step the etched photoresist cross section for feature sizes between 0.40 . . . 0.65 micrometer and bondpads by using a scanning electron microscope (SEM). We found that the real photoresist margin is independent on the feature size which we explain using a simple geometrical model. However, this value is remarkably smaller than the height of the remaining photoresist on top of the center part of a bondpad measured using a surface profiler. Subsequently, the profiler measurements result in selectivity values which are considerably higher than those measured at small features with cross section SEM analysis. We discuss advantages and limitations of profiler measurements. The comparison between the results of both methods open the possibility to utilize the advantages of surface profiling (e.g. non-destructive approach) by reducing the risk to get overestimated selectivity values for small features. This method is very useful in metal etch process development and forecasting the requirements for the future technology as well as to interpret absolute selectivity often quoted.

Paper Details

Date Published: 25 August 1997
PDF: 9 pages
Proc. SPIE 3213, Process, Equipment, and Materials Control in Integrated Circuit Manufacturing III, (25 August 1997); doi: 10.1117/12.284631
Show Author Affiliations
Vayalakkara Premachandran, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Raymond Joy, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Paul Kwok Keung Ho, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Lee Wei Lok, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Thomas Schuelke, Chartered Semiconductor Manufacturing Ltd. (United States)
Young Tsai, Chartered Semiconductor Manufacturing Ltd. (Singapore)


Published in SPIE Proceedings Vol. 3213:
Process, Equipment, and Materials Control in Integrated Circuit Manufacturing III
Abe Ghanbari; Anthony J. Toprac, Editor(s)

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