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Proceedings Paper

Development and characterization of multilevel metal interconnection etch process
Author(s): Kim Dang
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Paper Abstract

A more robust chlorine chemistry based reactive ion etch (RIE) process was developed, characterized and optimized to anisotropically etch the interconnecting metal layers for use in the fabrication of CMOS and BiCMOS IC devices, using the Lam 4600 single wafer etcher. The titanium nitride and titanium silicide buried layer, used in the metal 1 structure, present unique constraints on etch selectivity to the underlying film. The process must clear metal stringers with minimal lateral etching of the aluminum during the tiN/Ti etch and overetch steps. The new optimized process meets all requirements imposed by advanced technologies, such as vertical metal sidewalls, wide process latitude, tight CD control, minimal of TEOS oxide underlayer, less sensitivity to photoresist pattern, excellent reliability and reproducibility, and lower level of polymer (reaction by- product) build-up in reactor chamber which could lead to metal corrosion and cluster defects.

Paper Details

Date Published: 25 August 1997
PDF: 10 pages
Proc. SPIE 3213, Process, Equipment, and Materials Control in Integrated Circuit Manufacturing III, (25 August 1997); doi: 10.1117/12.284625
Show Author Affiliations
Kim Dang, Motorola (United States)

Published in SPIE Proceedings Vol. 3213:
Process, Equipment, and Materials Control in Integrated Circuit Manufacturing III
Abe Ghanbari; Anthony J. Toprac, Editor(s)

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