Share Email Print
cover

Proceedings Paper

Advantages of SOI technology in low-voltage ULSIs
Author(s): Makoto Yoshimi; Shigeru Kawanaka; Takashi Yamada; Mamoru Terauchi; Tomoaki Shino; Toshiaki Fuse; Yukito Oowaki; Shigeyoshi Watanabe
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

Low power advantage of SOI (silicon-on-insulator) technology is presented. A 0.5 V operation ALU is demonstrated by employing a gate-to-body connected structure. From the viewpoint of reliability in process integration, origin of a leakage current between source and drain is investigated in detail. The performance advantage of fabricated SOI ALUs over bulk devices as well as issues to be overcome are discussed.

Paper Details

Date Published: 27 August 1997
PDF: 10 pages
Proc. SPIE 3212, Microelectronic Device Technology, (27 August 1997); doi: 10.1117/12.284591
Show Author Affiliations
Makoto Yoshimi, Toshiba Corp. (Japan)
Shigeru Kawanaka, Toshiba Corp. (Japan)
Takashi Yamada, Toshiba Corp. (Japan)
Mamoru Terauchi, Toshiba Corp. (Japan)
Tomoaki Shino, Toshiba Corp. (Japan)
Toshiaki Fuse, Toshiba Corp. (Japan)
Yukito Oowaki, Toshiba Corp. (Japan)
Shigeyoshi Watanabe, Toshiba Corp. (Japan)


Published in SPIE Proceedings Vol. 3212:
Microelectronic Device Technology
Mark Rodder; Toshiaki Tsuchiya; David Burnett; Dirk Wristers, Editor(s)

© SPIE. Terms of Use
Back to Top