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Proceedings Paper

Impact of nitrogen ion-implantation on deep submicron SALICIDE process
Author(s): Chong Wee Lim; Syamal Lahiri; C. H. Tung; Sang Min Wong; Kong Hean Lee; Harianto Wong; Kin Leong Pey; Lap Hung Chan
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Paper Abstract

In this paper, key issues of salicide process are studied for a variety of additional nitrogen (N) implantation step. As devices are scaled down to deep sub-micron level, transformation of TiSi2 from the high resistivity metastable C49-phase to fmal C54-phase is retarded. Different techniques had been developed to enhance the silicidation process, including PAT (pre-amorphization implant) to enhance C54-phase TiSi2 nucleation, and ITM (Jmplant through metal) to iniroduce Ti/Si interface-mixing. It is of great interest to thrther improve the process such that the use of self-aligned TiSi2 process can be further extended down to deep sub-micron devices without switching to other materials. Impact of incorporating N implantation into the conventional self-aligned TiSi2 sub-micron CMOS devices is presented. Silicidation reaction is found to be enhanced by N implantation. As a result, lower sheet resistance is achieved on narrow polysilicon line. Low energy and dosage ion-implantation conditions are preferred in order to minimise the gate to source/drain leakage. p+ and n+ junction leakage will be further discussed in this article. This is the very first study on the effect of N ion-implantation on silicidation reaction. SEM and AFM were used to study the impact of N incorporation, cross-section TEM were perfonned to study the defects generated after N implantation. Keywords: N ion-implantation, RTA, TiSi2, sheet resistance, gate to source/drain leakage, junction leakage, salicide process, defects

Paper Details

Date Published: 27 August 1997
PDF: 11 pages
Proc. SPIE 3212, Microelectronic Device Technology, (27 August 1997); doi: 10.1117/12.284587
Show Author Affiliations
Chong Wee Lim, National Univ. of Singapore (Singapore)
Syamal Lahiri, National Univ. of Singapore (Singapore)
C. H. Tung, Institute of Microelectronics (Singapore)
Sang Min Wong, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Kong Hean Lee, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Harianto Wong, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Kin Leong Pey, Chartered Semiconductor Manufacturing Ltd. (Singapore)
Lap Hung Chan, Chartered Semiconductor Manufacturing Ltd. (Singapore)

Published in SPIE Proceedings Vol. 3212:
Microelectronic Device Technology
Mark Rodder; Toshiaki Tsuchiya; David Burnett; Dirk Wristers, Editor(s)

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