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Proceedings Paper

Fabrication of microrelief surfaces using a one-step lithography process
Author(s): Klaus Reimer; Ulrich Hofmann; M. Juerss; Wolfgang Pilz; Hans Joachim Quenzer; Bernd Wagner
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Paper Abstract

To fabricate arbitrarily shaped microrelief surfaces you should be able to design and control beside the X- and Y- direction also the Z-direction. With common micromachining technologies this could not be obtained. The surface micro machining technology, with sacrificial layer etching as a key process, is a planar technology, which offers no degree of freedom to design the surface in Z-direction. The bulk micro machining technology, with anisotropic KOH etching of silicon as a key process, offers only restricted possibilities for 3D design. To overcome this limitation binary optical elements have been fabricated using multi-mask processes or multidose e-beam or laser writing. For refractive optical lenses resist melting is a good compromise. This paper reports on a new methodology to fabricate the above discussed arbitrarily shaped structures using a one step lithography process. This technique is called one-level gray-tone lithography, which is common to standard IC manufacturing processes, supplemented by some processes like spincoating and developing of thick resist layer, electroplating of thick metal layers and dry etching. This group of processes has been collected into a new technology category with free design capabilities in Z- direction up to 20 micrometer: relief micro machining. Particular emphasis is put on the design of the halftone transmission masks. The algorithms to transfer an initial height profile into a design representation in the common data format GDSII are discussed. The great data amount of a reticle layout is reduced significantly by a first order data compaction. The specific parameters for the mask making and the resist process are determined. Several components like shaped gratings or lenses are shown in resist up to 15 micrometers thick. In the field of transferring the pattern into a substrate material like silicon or glass, a dry etching process is evaluated.

Paper Details

Date Published: 2 September 1997
PDF: 9 pages
Proc. SPIE 3226, Microelectronic Structures and MEMS for Optical Processing III, (2 September 1997); doi: 10.1117/12.284557
Show Author Affiliations
Klaus Reimer, Fraunhofer-Institute for Silicon Technology (Germany)
Ulrich Hofmann, Fraunhofer-Institute for Silicon Technology (Germany)
M. Juerss, Fraunhofer-Institute for Silicon Technology (Germany)
Wolfgang Pilz, Fraunhofer-Institute for Silicon Technology (Germany)
Hans Joachim Quenzer, Fraunhofer-Institute for Silicon Technology (Germany)
Bernd Wagner, Fraunhofer-Institute for Silicon Technology (Germany)


Published in SPIE Proceedings Vol. 3226:
Microelectronic Structures and MEMS for Optical Processing III
M. Edward Motamedi; Hans Peter Herzig, Editor(s)

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