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Proceedings Paper

Application of charge-dispersing layer to reticle fabrication
Author(s): Kotaro Shirabe; Eiichi Hoshino; Keiji Watanabe
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Paper Abstract

The surface imaging (SI) technique to apply to reticle fabrication was investigated. We have proposed an electron- beam (EB) bi-level resist system to fabricate reticles for 1- Gbit DRAMs. The SI technique does not have only an effect to plane the surface of substrate with steps but also good performance to achieve high resolution due to thinner resist as a top layer. It was also found that there was no proximity effect correction to be needed to create the high accuracy patterns on the reticle by using bi-level process. This effect is caused from the reason why Cr and Cr oxide of which mask materials are consisted reflects forwarded electrons strongly. So the resist film in the region near by the surface of opaque film was easily affected by undesirable secondary electrons. For this purpose we made an experiment to set these phenomena in order. Figure 1 and figure 2 shows resist images of contact hole designs on reticles by using bi-level and conventional method respectively. We could find this technique useful to improve quality of corner round because according to properties of line width, the amount of exposed energy was quite different in each case even if every resist was given the same dosage.

Paper Details

Date Published: 28 July 1997
PDF: 5 pages
Proc. SPIE 3096, Photomask and X-Ray Mask Technology IV, (28 July 1997); doi: 10.1117/12.277270
Show Author Affiliations
Kotaro Shirabe, Fujitsu Ltd. (Japan)
Eiichi Hoshino, Fujitsu Ltd. (Japan)
Keiji Watanabe, Fujitsu Labs. Ltd. (Japan)

Published in SPIE Proceedings Vol. 3096:
Photomask and X-Ray Mask Technology IV
Naoaki Aizaki, Editor(s)

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