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Proceedings Paper

Fast chip-level OPC system on mask database
Author(s): Hidetoshi Ohnuma; Keisuke Tsudaka; Hiroichi Kawahira
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Paper Abstract

A fast chip-level automatic optical proximity effect correction (OPC) method has been newly developed for use in ULSI device fabrication. The method here is dedicated for random logic application specific IC (ASIC) devices to improve critical dimension control in lithography process with a design rule of 0.25 micrometer and below. The newly developed OPC method applies rule based correction performed on a mask database (database constructed by a mask data format for mask writing tools). Utilizing OPC onto such database can reduce elapsed time to prepare OPCed one chip layout data significantly. Here, in succession, data compaction is performed on the database as well with a has tabled internal data hierarchy. As a result, actual elapsed correction time with data compaction for a 0.25 micrometer ASIC device wiring layer was within 3 hours, and data size after OPC was about 50 Mbytes. In terms of pattern printing accuracy with this OPC, resist edge placement errors were markedly reduced with respect to line end shortening and pattern width variation depending on the adjacent space width. In this paper, the OPC method is described in detail with actual performance applied for 0.25 micrometer ASIC devices.

Paper Details

Date Published: 28 July 1997
PDF: 9 pages
Proc. SPIE 3096, Photomask and X-Ray Mask Technology IV, (28 July 1997); doi: 10.1117/12.277249
Show Author Affiliations
Hidetoshi Ohnuma, Sony Corp. (Japan)
Keisuke Tsudaka, Sony Corp. (Japan)
Hiroichi Kawahira, Sony Corp. (Japan)

Published in SPIE Proceedings Vol. 3096:
Photomask and X-Ray Mask Technology IV
Naoaki Aizaki, Editor(s)

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