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Proceedings Paper

Use of exposure compensation to improve device performance for speed and binning based on electrical parametric feedback into fabrication design
Author(s): Paul W. Ackmann; Stuart E. Brown; Richard D. Edwards; Doug Downey; Mark Michael; Karen L. Turnquest; John L. Nistler
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Paper Abstract

As the device performance requirements tighten to improve speed distributions, the speed binning caused by across the wafer critical dimension (CD) variation will have significant impact on manufacturing performance yields. Overall speed performance yields are impacted by wafer to wafer and across wafer poly CD and poly profile variation caused at photo and etch. With the use of our final technique, called `Exposure Compensation', we were able to compensate for CD variation seen at final FI CD and electrical test. Implementation of exposure compensation process gave an effective two week control that exceeded the goal of 90 nm total electrical distribution. The improved control at FI CD can clearly be seen from the results of electrical measurements and transistor performance. While the techniques adequately improve site to site variation, further work is still required to improve across field variation.

Paper Details

Date Published: 7 July 1997
PDF: 7 pages
Proc. SPIE 3051, Optical Microlithography X, (7 July 1997); doi: 10.1117/12.275998
Show Author Affiliations
Paul W. Ackmann, Advanced Micro Devices, Inc. (United States)
Stuart E. Brown, Advanced Micro Devices, Inc. (United States)
Richard D. Edwards, Advanced Micro Devices, Inc. (United States)
Doug Downey, Advanced Micro Devices, Inc. (United States)
Mark Michael, Advanced Micro Devices, Inc. (United States)
Karen L. Turnquest, Advanced Micro Devices, Inc. (United States)
John L. Nistler, Advanced Micro Devices, Inc. (United States)


Published in SPIE Proceedings Vol. 3051:
Optical Microlithography X
Gene E. Fuller, Editor(s)

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