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Proceedings Paper

Application of alternating phase-shifting mask to 0.16 um CMOS logic gate patterns
Author(s): Koji Matsuoka; Akio Misaka
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Paper Abstract

An application of alternating phase-shifting mask to 0.16 micrometers logic gate patterns is studied. A double exposure method using positive resist in KrF excimer laser lithography is applied to obtain random gate patterns. To optimize the exposure conditions, proximity effects for 0.16 micrometers line patterns under various combinations of NA and (sigma) are examined using an aerial image simulator. To control the linewidth in +/- 10% CD, mask bias according to the space width and the mask pattern with two adjacent apertures which transfers an isolated line are applied. By using these techniques, 0.16 micrometers logic gate patterns including SRAM are demonstrated.

Paper Details

Date Published: 7 July 1997
PDF: 10 pages
Proc. SPIE 3051, Optical Microlithography X, (7 July 1997); doi: 10.1117/12.275975
Show Author Affiliations
Koji Matsuoka, Matsushita Electric Industrial Co., Ltd. (Japan)
Akio Misaka, Matsushita Electric Industrial Co., Ltd. (Japan)


Published in SPIE Proceedings Vol. 3051:
Optical Microlithography X
Gene E. Fuller, Editor(s)

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