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Proceedings Paper

Challenge of 1-Gb DRAM development when using optical lithography
Author(s): Timothy R. Farrell; Ronald Nunes; Donald J. Samuels; Alan C. Thomas; Richard A. Ferguson; Antoinette F. Molless; Alfred K. K. Wong; Will Conley; Donald C. Wheeler; Santo Credendino; Munir Naeem; Peter Hoh; Zhijian G. Lu
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Paper Abstract

The traditional lithographic approach employed by the semiconductor industry has been to pursue use of advanced prototype optical exposure tools and resists. The benefits of doing so have been: (1) The lithographic process that is used in development more closely resembles the process that will in fact be used to manufacture the chip. (2) The cost of low K1 imaging (phase-masks, off-axis illumination, and surface imaging resist) can be avoided. However with the introduction of 1Gb-dynamic random access memory (DRAM) development, a paradigm shift is being experienced within the optical lithographic community. With 1Gb-DRAMs, the minimum feature size falls irreversibly below the optical wavelength used to image the feature. Such a situation will make low K1 factor imaging unavoidable. With 175 nm groundrules typical for first generation 1G-DRAMs, K1 factors near 0.4 will be common with 0.5 as an upper limit on advanced systems currently in development irrespective of optical wavelength. This paper will cover the selection process, experimental data, and problems encountered in defining and integrating the lithographic process used to support the critical mask levels on 1Gb-DRAM development. Factors considered include: resist, masks, and illuminations via both simulation and experiment. The simulations were conducted with both internal and externally developed software. The experimental data to be reviewed was generated using an experimental 0.6 NA KrF step and scan system provided by Nikon. The resist used is commercially available from the Shipley corporation.

Paper Details

Date Published: 7 July 1997
PDF: 9 pages
Proc. SPIE 3051, Optical Microlithography X, (7 July 1997); doi: 10.1117/12.275974
Show Author Affiliations
Timothy R. Farrell, IBM Microelectronics Div. (United States)
Ronald Nunes, IBM Microelectronics Div. (United States)
Donald J. Samuels, IBM Microelectronics Div. (United States)
Alan C. Thomas, IBM Microelectronics Div. (United States)
Richard A. Ferguson, IBM Microelectronics Div. (United States)
Antoinette F. Molless, IBM Corp. (United States)
Alfred K. K. Wong, IBM Microelectronics Div. (United States)
Will Conley, IBM Microelectronics Div. (United States)
Donald C. Wheeler, IBM Microelectronics Div. (United States)
Santo Credendino, IBM Microelectronics Div. (United States)
Munir Naeem, IBM Microelectronics Div. (United States)
Peter Hoh, IBM Microelectronics Div. (United States)
Zhijian G. Lu, Siemens Corporate Research, Inc. (United States)

Published in SPIE Proceedings Vol. 3051:
Optical Microlithography X
Gene E. Fuller, Editor(s)

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