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Proceedings Paper

Novel approach for defect detection and reduction techniques for submicron lithography
Author(s): Jonathan A. Orth; Khoi A. Phan; David Ashby Steele; Roger Y. B. Young
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Paper Abstract

Accurate and reproducible microlithography processing is critical for developing smaller and more dimensionally accurate semiconductor structures. As modern microprocessors and memory devices scale down to deep submicron dimensions, defects originating in the microlithography processes become increasingly effective in reducing yield. Careful and efficient methods of measuring the variability of these defect levels by utilizing a shortloop monitoring process is essential in controlling the quality of lithography process for these semiconductor devices. During the conventional photo process, a defect can result from either an external process variable (e.g. manual wafer handling), or an internal one from environmental sources (unclean equipment sets). Others may be related to the process parameters themselves; such as a pattern anomaly, marginal processing by the equipment, or a previous defect on the wafer creating a nucleation site for more defects. Since microlithography defects can arise from a variety of sources, adopting flexible and efficient methods of measuring their effects are essential in maximizing the yield. This study will discuss the methodologies used to characterize and monitor complete microlithography processing for two distinct cases: one in which the resist is mostly unexposed with the exception of a pattern of contact holes, and one in which most of the resist is exposed, leaving behind a developed pattern of resist lines. These two strategies, when used in conjunction and properly sampled in a defect metrology tool can lead to timely in-line feedback about the nature of possible processing defects present. Furthermore, the results of such a short loop may suggest continued short loop processing involving fewer processing steps to narrow the source.

Paper Details

Date Published: 7 July 1997
PDF: 16 pages
Proc. SPIE 3050, Metrology, Inspection, and Process Control for Microlithography XI, (7 July 1997); doi: 10.1117/12.275952
Show Author Affiliations
Jonathan A. Orth, Advanced Micro Devices, Inc. (United States)
Khoi A. Phan, Advanced Micro Devices, Inc. (United States)
David Ashby Steele, Advanced Micro Devices, Inc. (United States)
Roger Y. B. Young, Advanced Micro Devices, Inc. (United States)


Published in SPIE Proceedings Vol. 3050:
Metrology, Inspection, and Process Control for Microlithography XI
Susan K. Jones, Editor(s)

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